1. Field
The present disclosed exemplary embodiments relates generally to serially decoding, and more specifically to demultiplexing a serial data stream into a parallel data stream.
2. Background
In the field of interconnect technologies, demand for ever increasing data rates, especially as related to video presentation, continues to grow. One adaptive interface for facilitating increasing data rates is a high-speed serial link (HSSL) which is a cost-effective, low-power consumption, transfer mechanism that enables very-high-speed data transfer over a short-range communication link between a host and a client. Generally, a high-speed serial link requires a minimum of just four wires plus power for bi-directional data transfer that delivers a maximum bandwidth of several gigabits per second.
In one application, a high-speed serial link increases reliability and decreases power consumption, for example, in two-part handsets by significantly reducing the number of wires that traverse across a handset's two-part interface for interconnecting, for example, the digital baseband processor portion with the display portion. This reduction of wires also allows handset manufactures to lower development costs by simplifying the two-part handset designs.
Other high-speed data transfer applications also benefit from serial-based data transfer. High-speed data transfer needs result in a demand on physical layers to provide gigabit per second speeds over serial data links. In order to reduce the effects of serial data transfer, the data may be encoded or formatted into 8B/10B code to provide better DC-balance by limiting the run-lengths of “1's” and “0's” to five. Accordingly, when serial data in 8B/10B format is received, a deserializer needs to perform serial-to-parallel conversion of the serial stream and further align the 10-bit words for decoding.
In the deserialization process, a demultiplexer is used to provide serial-to-parallel conversion. For power limited applications, the demultiplexer can consume significant power resulting in a reduction in system performance. Accordingly, there is a need for serial-to-parallel conversion and alignment of parallel data into words for parallel processing of the data that requires less power than prior solutions.